In 1988, two space probes of identical construction, Phobos-1 and Phobos-2, were launched from the Soviet Union towards the planet Mars. As planetary missions, they were devoted to studying the planet Mars and its vicinity, along with its natural satellite Phobos giving the expedition its name, and also the Sun and the interplanetary environment. At the time of the Phobos encounter, two small landers should have been separated from them.
The Phobos-1 failed to get directed towards the Mars but Phobos-2 managed to get close to it. Shortly before the final phase of the mission during which the spacecraft was to approach within 50 m of Phobos’ surface and release two landers (one a mobile ‘hopper’, the other a stationary platform), the contact with Phobos-2 was lost. The mission ended when the spacecraft signal failed to be successfully reacquired on 27 March 1989. The cause of failure was to be a malfunction of the orbiters's onboard computer.
Our human resource participated in the development of the central computer of the stationary lander by the leading of KFKI RMKI. It was planned to control all of the small spacecraft’s scientific experiments (Longterm Autonomous Lander LAS - Russian short name is DAS) and the service system (radio, energy and thermal systems). The computer had a fault-tolerant architecture: a single error would not cause degradation in operation in operation; in the case of multiple errors some degradation could arise: certain experiments would be terminated but the functionality of the lander should be maintained. The central processor unit contained two 8-bit microprocessors, three independent memory data flows were united in majority logic. The circuit worked even if one of the memories was not functional, and the majority logic circuits could be switched over to multiplexers by commands and data could be read from the selected memory unit. Another protection method was the use of two alternative write-protected areas in the memory in which the basic system status information was saved periodically. This protected system information could have been used in case of failure when a processor switch-over happens. In this system, the clock unit was four times active (hot) reserved, and the other units of the system (interfaces) had passive (cold) redundancy.
2 4. March 2015
Phobos s/c integration
Longterm Autonomous Lander (DAS)
Planned Landing on Phobos surface